edakit documentation

LVL levels

Every input defined in every state, no two drivers fight – 5 codes.

Each engine decides one kind of relation; a finding's code is ENGINE.relation. Severities are the catalog's defaults – a project's domains may set others; a grade is a sub-case with its own severity, a topic the part of a code a domain switches on.

LVL.undefined input defined while the firmware is not running

errornc: warningopen_drain: warninganalog: warning

Every input has a driver or a pull resistor, an input that only MCU pins drive has a pull, a bipolar transistor has a resistor from its base to its emitter or a rail and a MOSFET from its gate to its source or a rail – a rail being a net a pin defines, a supply – a net a source of sim.json feeds too, brought in at a connector –, ground, or a net resistors hold to them (a bias divider's middle: the base of an analog stage). Graded as warnings while new: an input pin of an IC left in nc (nc), a net only open-drain or tri-state outputs drive – unless their enable pins are tied active – and that no resistor path holds (open_drain; a bridge output, drive bridge, defines its net; a net with nothing on it but the outputs and their LEDs – a cathode, or an LED behind its series resistor – is the outputs' load – an LED from the supply into a 555's discharge pin, a charger's status LEDs –, which nothing reads), an analog node only capacitors reach (analog; a pin the part biases itself, biased = true, gives it its level).

  • no floating input: an input needs a driver or a pull resistor; an input driven only by MCU pins needs a pull (floats until the firmware runs); every BJT needs a base-emitter resistor, every MOSFET a resistor from its gate to the source or a rail – finds e.g.: a floating OE or EN pin at power-up, a MOSFET half on while the MCU boots
Why
A floating CMOS input reads random values and can rest where both input transistors conduct. An MCU pin is an input until the firmware configures it, so an enable line it drives floats at every reset.
What to do
A pull resistor to the inactive level (10–100 kΩ); a base-emitter or gate-source resistor next to the transistor. Harmless on purpose: accept on the net with the reason.
Sources
  1. TI SCBA004E, Implications of Slow or Floating CMOS Inputs (2021), section 1 – https://www.ti.com/lit/an/scba004e/scba004e.pdf
  2. TI SLUA618A, Fundamentals of MOSFET and IGBT Gate Driver Circuits (2018), 3.5 dv/dt protection: a gate-source resistor holds the MOSFET off during power-up – https://www.ti.com/lit/ml/slua618a/slua618a.pdf

Replaces G-4

LVL.contention one driver per net

error

At most one push-pull output or supply output drives a net.

  • at most one push-pull output / supply output per net – finds e.g.: two outputs against each other
Why
Two outputs that disagree short the supply through their output stages: high current, heat, an undefined level.
What to do
Separate the nets, make one side an input, or use open-drain outputs with a pull-up.
Sources
  1. edakit handbook 3.3

Replaces G-5

LVL.boot strapping pins at their level at reset

error

A pin whose entry gives strap high or low is at that level at reset: no pull, ground, supply or output on its net says otherwise, and something – an external pull or the pin's own pull – holds it there.

  • strapping pins: a pin with strap in its parts entry is at that level at reset – no pull, rail or output on its net says otherwise, and something holds it (a pull, or the pin's internal pull) – finds e.g.: a pull-down on the ESP32's GPIO0, an I2C pull-up on GPIO12
Why
Many MCUs read boot options from pins at reset: the ESP32 starts its download mode with GPIO0 low and sets its flash supply to 1.8 V with GPIO12 high.
What to do
Keep pulls and outputs that disagree off strapping pins, or move the function to another pin.
Sources
  1. Espressif ESP32 Series Datasheet v5.3, 3 Boot Configurations, table 3-1 – https://documentation.espressif.com/esp32_datasheet_en.pdf

Replaces G-12

LVL.threshold logic levels reach the thresholds

error

Every input with thresholds (vih/vil on the pin or in the values) sits at ≤ VIL or ≥ VIH in every scenario, and the high level of every MCU output reaches the VIH of what it drives.

Why
A 3.3 V MCU output into a 5 V shift register with VIH 0.7 × VDD = 3.5 V works on the bench and fails at the next batch.
What to do
A level shifter, a part with thresholds that fit the rail, or the part on the lower rail.
Sources
  1. edakit handbook 5.3
  2. TI SLVS695D (TLC591x, June 2007, revised January 2015), 7.3 Recommended Operating Conditions: VDD 3–5.5 V; VIH 0.7 × VDD … VDD and VIL 0 … 0.3 × VDD for CLK, OE(ED2), LE(ED1) and SDI
  3. TI SLIS032D (TPIC6B595, July 1995, revised April 2025), 5.3 Recommended Operating Conditions: VCC 4.5–5.5 V, VIH ≥ 0.85 VCC, VIL ≤ 0.15 VCC
  4. ST DocID13524 Rev 8 (STP08CP05, August 2018), table 6 Recommended operating conditions: VDD 3.0–5.5 V, VIH 0.7 VDD … VDD + 0.3 V, VIL −0.3 … 0.3 VDD

Replaces E-3

LVL.direction outputs only on pins that drive

error

The simulation drives an MCU output only on a pin that can drive (output or bidirectional).

Why
An input-only pin – the ESP32's GPIO34–39 – never drives its net; the load stays off.
What to do
Move the function to a pin that can drive.
Sources
  1. edakit handbook 5.3

Replaces E-3