REQ requires

What a part requires on its pins is in the graph: a capacitor to ground – or to a net of the graph's grounds – per supply pin (power_in), a pull-up per I2C line, a diode across a switched coil (cathode at its plus), Rd on each CC pin of a USB-C receptacle without controller, a layout.loops entry on each net of a hot loop (hot_loop), and what a pin's parts entry says it needs (needs: a capacitor to ground or between two of its pins, a pull-up or pull-down, a series resistor, ground, a crystal between two of its pins – also behind a series damping resistor at either, as at an RP2040's XOUT –, a tie to another of its pins) – grade pin. Warnings while new: D+ and D− of a USB-C receptacle joined across both rows (usb_data), a series resistance on a signal net that leaves the board – through a cable, or on a connector the graph marks off_board (leave), a diode per key of a matrix (matrix), balancing resistors across capacitors in series (balance), a termination at each end of an RS-485 or CAN bus – the transceivers' pins with the roles rs485_a/rs485_b or canh/canl; one behind a switch or jumper counts closed (termination), diodes to the supply and from ground at an output without clamp diodes of its own (pin clamp = "none", the L298's bridges) that drives a winding or a connector (clamp), the divider of an adjustable regulator (values vref_v, a pin adj or fb – feedback).

• decoupling: per net at least one capacitor to ground per IC supply pin (power_in) – finds e.g.: the missing 100 nF
• I2C pull-ups: every I2C line has a pull-up to a supply between (V − 0.4 V) / 3 mA and 10 kΩ, parallel ones added up; a line is I2C by the net's bus, an SDA/SCL net name, a pin role sda/scl or a pin name with SDA/SCL (a role decides over the name); pins with pull/pull_ohm count (modules) – finds e.g.: a bus without pull-ups, 47 kΩ, a module's pull-ups plus your own below 1 kΩ
• flyback diode: a relay coil or a buzzer with coil_ohm, switched by a transistor or an output, has a diode across it with the cathode at its plus terminal – finds e.g.: a relay that kills its transistor at the first switch-off
• USB-C sink: a receptacle with cc1/cc2 pins has its own 5.1 kΩ ± 10 % to ground on each CC pin; silent when an IC is on the CC lines. A module or breakout states its receptacle's termination in values.usb_c (4.1): rd_5k1 or controller passes, none has its CC pins checked the same way and fails without them – finds e.g.: no 5 V from a USB-C charger, CC1 and CC2 on one resistor, a breakout without its two resistors
• hot loop in the hand-over: a part whose entry names its hot-loop pins (hot_loop, 4.1) has a layout.loops entry on every net of the loop – the nets of those pins and, one diode further, the net behind the rectifier on its switch node (sw); a buck, boost, buck-boost or constant-current LED buck IC (behavior) without hot_loop is a warning; accept on the part, or on a net whose part of the loop closes over a pour – finds e.g.: a boost whose output loop was routed 61 mm across the board, passing every check because nobody listed it

Why

Each requirement is a datasheet's or a standard's: an IC draws its current in pulses, open-drain lines never go high alone, a coil's turn-off spike breaks the switch, a USB-C source gives no power without Rd, a long hot loop rings and radiates.

What to do

Add the part next to the pin (blocks: i2c-pullups, usb-c-sink), or write the loop into layout.loops.

Sources

1. Analog Devices MT-101, Decoupling Techniques (Rev. 0, 2009) – https://www.analog.com/media/en/training-seminars/tutorials/MT-101.pdf
2. NXP UM10204 Rev. 7.0, I2C-bus specification and user manual (2021), 7.1 Pull-up resistor sizing and table 10 – https://www.nxp.com/docs/en/user-guide/UM10204.pdf
3. TE Connectivity, The Application of Relay Coil Suppression with DC Relays (white paper) – https://www.te.com/en/products/relays-and-contactors/relays/intersection/relay-coil-suppression-dc-relays.html
4. Richtek AN064, USB Type-C/PD Brief Introduction and Analysis (2021): a sink asserts Rd on the CC pins – https://www.richtek.com/~/media/AN%20PDF/AN064_EN.pdf
5. USB Type-C Cable and Connector Specification (USB-IF): sink termination Rd = 5.1 kΩ
6. TI SNVA021C, AN-1149 Layout Guidelines for Switching Power Supplies, Rev. C (2013), 5 Traces and Ground Plane: inductor, output capacitors and output diode as close to each other as possible; the grounds of IC, input capacitors, output capacitors and output diode connected close together directly to a ground plane – https://www.ti.com/lit/an/snva021c/snva021c.pdf
7. Lesson of pytree (D-41, 2026-10-23): in the released run 20261023-000107 the MT3608 boost's diode cathode (D33) reached its output capacitor C13 over 61 mm of copper across the board; DRC, the gate and the electrical review passed it, the layout review (M-5) found it; the fix listed four pad pairs (L1.2–U6.1 ≤ 6 mm, U6.1–D33.2 ≤ 5 mm, D33.1–C13.1 ≤ 5 mm, C13.2–U6.2 ≤ 8 mm), the 61-mm segment on V_LED, a net without a pin of U6
8. TI SLLA272D, The RS-485 Design Guide (revised May 2021), 6: 120-Ω resistors, one at each cable end – https://www.ti.com/lit/pdf/slla272; TI SLOA101B (revised May 2016), 6: CAN terminated at both ends with 120 Ω – https://www.ti.com/lit/pdf/sloa101 (grade termination)
9. STMicroelectronics L298 Dual Full-Bridge Driver datasheet (January 2000), 3 Applications: 'An external bridge of diodes are required when inductive loads are driven and when the inputs of the IC are chopped'; diodes fast recovery, trr ≤ 200 ns – read from LCSC's copy for C19922, https://datasheet.lcsc.com/datasheet/pdf/c23fc6a8cabb45a298a1d3a512b515a9.pdf (grade clamp)

Replaces G-6, G-11, G-13, G-14, G-18

A required part has its value inside the range: an I2C pull-up (in parallel with the pins' own pulls) between (V − 0.4 V) / 3 mA and 10 kΩ, Rd 5.1 kΩ ± 10 % on a CC pin, what a pin needs inside the window its entry gives – a capacitor's window on the capacitors layout.near places next to the part where it names any on the net, else on the net's sum; a crystal's frequency; a required capacitor's voltage rating at least its v_min_v (grade pin), a capacitor minimum the nominal values meet but the capacitance left at the highest DC the nets' declared ranges put across them does not – the maker's curve, values dc_bias; a capacitor without one counts with its nominal value (grade bias), a capacitor need's ESR window (esr_min_ohm, esr_max_ohm: a regulator's output capacitor) filled by capacitors whose esr_ohm lies inside it, up to the need's minimum after DC bias (grade esr), the source resistance an ADC pin sees (adc.r_source_max_ohm, unless a hold capacitor, after DC bias; grade adc), the DC load on an instrument input – a resistor in series into capacitors and high-impedance pins no load (net load_min_ohm; grade instrument), an op-amp's closed-loop gain against its minimum stable gain (gain_min_ratio; grade gain), a termination of an RS-485 or CAN bus of the cable's 120 Ω (grade termination), the idle voltage an RS-485 bias pair sets across the terminations at least 200 mV at the supply's lowest voltage, the far end's termination assumed where the graph holds one end (grade failsafe), a configuration pin that reads its setting by voltage window (pin windows, with the pin's own pull in the operating point) inside one window, not between two (grade window, stage E), the output an adjustable regulator's divider sets within the output net's declared range – VOUT = VREF × (1 + R2/R1) with ADJ, × (1 + R1/R2) with FB (grade feedback), and in the simulation the DC across a switch, relay contact or pot – not a trimmer (values adjust trimmer), set once at the bench – whose sides are both in a signal path (nets with signal or instrument) within 10 mV in every scenario – each pole of a switch of several poles and each contact set of a relay apart (grade switch), and every voltage a USB PD sink's configuration pins can request (values pd_request_v by the CFG levels on the board: ground, a supply, or either where a pin floats or the firmware sets it) within the declared range of the VBUS net its sense pin reaches (grade pd_request), the DC through a closed contact at least the minimum load of its entry (min_load_a) – not a key of a key matrix while its diode blocks it, its row not scanned –, a contact in a signal path rated for signal currents – min_load_a at most 10 µA (grade min_load); and an output's load – its DC resistance to fixed levels at least the pin's r_load_min_ohm, the capacitors on its net at most its c_load_max_f (grade load); the sense resistor of a constant-current LED driver at least the r_sense_min_ohm of its entry – the PT4115's 0.082 Ω (grade cc, stage E).

• DC bias: a class-2 ceramic (X5R, X7R …) keeps only part of its capacitance at a DC across it – KEMET's 4.7 µF 6.3 V 0603 X5R (C5126849) 43 % at 5 V, its 10 µF 16 V 0805 (C2167271) 56 %. A capacitor's dc_bias is the maker's curve as [[V, ratio], …], linear between its points; a minimum (c_min_f of a pin need, an ADC's c_hold_min_f) is judged on the capacitance left at the highest DC the declared ranges of its two nets put across it, a maximum on the nominal value; a capacitor without a curve counts nominal and the coverage report names it. The transient and AC netlists take the same value – finds e.g.: a regulator's 1 µF-effective output met on paper by a 2.2 µF 0603 on 5 V
• ESR window: an LDO compensated by its output capacitor's ESR zero needs that ESR inside a window – TI's LM1117 0.3 … 22 Ω with at least 10 µF tantalum, Richtek's RT9080 at least 1 mΩ; a pin need's esr_min_ohm/esr_max_ohm against the capacitors' esr_ohm (at 100 kHz; [min, typ, max] – the lowest known against the minimum, the highest against the maximum). Holds when the capacitance inside the window reaches the need's minimum; a capacitor without esr_ohm leaves it unjudged (coverage) – finds e.g.: an LDO that needs ESR with only ceramics on its output
• minimum load: a contact needs a least current to close reliably – a film on the contact that no current breaks; a relay's datasheet calls it "minimum applicable load" (values min_load_a). The simulation compares the DC through every closed contact with it, except in a signal path: there a contact carries no DC by design (grade switch) and the signal a few µA, and its entry is held to at most 10 µA – the minimum applicable load of a relay made for signals (Hongfa HFD4: 10 µA at 10 mV, a reference value), edakit's line for a contact rated for signal currents (rules-at-scale.md, decision 14) – finds e.g.: a relay with a 1 mA minimum load in a guitar's bypass, a gold DIP switch that closes onto a CMOS input with no pull and so carries no current

Why

A weak I2C pull-up makes the edges too slow, a strong one cannot be pulled low; a CC resistor outside its window reads as another device.

What to do

4.7 kΩ for 100 kHz, 2.2 kΩ for 400 kHz on I2C; 5.1 kΩ per CC pin.

Sources

1. China Resources Powtech PT4115 data sheet PT4115_DS Rev EN_2.9, p. 3 mean current sense threshold A type 95 / 98 / 101 mV, p. 4 continuous SW current 1.2 A, p. 11 'IOUT = 0.1 / Rs (Rs ≥ 0.082Ω)', p. 12–13 on-time equation TON = L × ΔI / (VIN − VLED − Iavg × (Rs + rL + Rsw)), Rsw 0.6 Ω nominal, ΔI internally 0.3 × Iavg – LCSC's copy for C84512, https://datasheet.lcsc.com/datasheet/pdf/710aeebb569349bc814ba1f6ba8cbef1.pdf (grade cc)
2. WCH CH224 手册1 version 2.1: CH224K reference 6.2 p. 9 – CFG1 1 → 5 V; CFG1 0 with CFG2 CFG3 00 → 9 V, 01 → 12 V, 11 → 15 V, 10 → 20 V – the pd_request grade
3. docs/concepts/done/maker-coverage.md, CK-30 (appendix GTP 31, 37; GTI 31; AUD 13) – no DC where signals are switched; the 10 mV is edakit's choice for its "within a few mV"
4. Hongfa HFD4 data sheet, 2024 Rev. 1.00, contact data: 'Min. applicable load 10mV 10µA', note 2: 'Min. applicable load is reference value' (grade min_load, and the 10 µA a contact in a signal path may need at most; LCSC's copy for C64399)
5. NXP UM10204 Rev. 7.0, I2C-bus specification and user manual (2021), 7.1 Pull-up resistor sizing and table 10 – https://www.nxp.com/docs/en/user-guide/UM10204.pdf
6. USB Type-C Cable and Connector Specification (USB-IF): sink termination Rd = 5.1 kΩ
7. TI SLLA272D, The RS-485 Design Guide (revised May 2021), 6 and 7: 120 Ω at each cable end; idle-bus failsafe VAB = 200 mV + noise – https://www.ti.com/lit/pdf/slla272 (grades termination, failsafe)
8. TI SLOA101B, Introduction to the Controller Area Network (CAN) (revised May 2016), 6: terminated at both ends with 120 Ω – https://www.ti.com/lit/pdf/sloa101 (grade termination)
9. Maxim MAX98357A/MAX98357B datasheet 19-6779 Rev 11 (5/18): SD_MODE comparator trip points B0 0.08/0.16/0.355 V, B1 0.65/0.77/0.825 V, B2 1.245/1.4/1.5 V, pull-down RPD 92/100/108 kΩ, Table 5 SD_MODE Control, Table 6 pull-up examples – read from LCSC's copy for C910544, https://datasheet.lcsc.com/datasheet/pdf/9dd365a93d191d8d6f09766b0e3ea172.pdf (grade window: the example of pin windows)
10. Advanced Monolithic Systems AMS1117 datasheet, Application Hints, Output Voltage: a 1.25 V reference between the output and the adjust terminal, VOUT = VREF (1 + R2/R1) + IADJ R2 (Figure 2); Reference Voltage 1.232/1.250/1.268 V – read from LCSC's copy for C6186, https://datasheet.lcsc.com/datasheet/pdf/e6935943fc6b1bbf350a1a0f3e90dc4a.pdf (grade feedback)
11. KEMET part sheets C0603C475K9PACTU and C0805C106K4PACTU (YAGEO group), generated 2026-10-31, p. 2 'Capacitance Change vs. DC Voltage Bias' and 'Impedance and ESR' (K-SIM, the typical part, not a specification), read from the graphs – https://search.kemet.com/download/specsheet/C0603C475K9PACTU (grade bias: the curves of the library entries C5126849 and C2167271)
12. TI LM1117 data sheet SNOS412Q (February 2000, revised January 2023), 9.2.2.1.3 Output Capacitor: minimum 10 µF if tantalum, ESR of the output capacitor 0.3 Ω to 22 Ω – https://www.ti.com/lit/ds/symlink/lm1117.pdf (grade esr)
13. Richtek RT9080 data sheet DS9080-05 (June 2017), Operation p. 3: 1 µF effective capacitance after the temperature and voltage coefficient; Application Information p. 11: output capacitor ESR at least 1 mΩ – LCSC's copy for C841192 (grades bias and esr)

Replaces G-11, G-14

What a part forbids does not happen: CC1 and CC2 of a USB-C receptacle on one net (one resistor for both), a pin whose entry says never_to_ground on ground, an external pull resistor on a pin whose entry says no_pull, a series resistor on one that says no_series (grade pin), two devices on one bus at one address (grade address: base and address pins of the entries – a pin with four states, tied to low, high, SDA or SCL, adds what its entry gives for each), a bridge-tied output (roles out_p, out_n) on ground, on another part's net or on another channel's (grade btl), the diodes of a key matrix pointing both ways (grade matrix), more than two terminations on an RS-485 or CAN bus (grade termination).

Why

With CC1 and CC2 on one resistor an electronically marked cable reads as a fault and the source gives no power.

What to do

One resistor per CC pin.

Sources

1. Richtek AN064, USB Type-C/PD Brief Introduction and Analysis (2021): a sink asserts Rd on the CC pins – https://www.richtek.com/~/media/AN%20PDF/AN064_EN.pdf
2. USB Type-C Cable and Connector Specification (USB-IF): sink termination Rd = 5.1 kΩ
3. TI SLLA272D, The RS-485 Design Guide (revised May 2021), 6: the cable trunk terminated with 120-Ω resistors, one at each cable end – https://www.ti.com/lit/pdf/slla272 (grade termination: more than two)

Replaces G-14

A net's fn (pwm, adc, spi.sck, i2c.sda, uart.tx, …) is on a pin of a microcontroller or module whose entry lists it in functions – or that its GPIO matrix serves (entry matrix: the fn kinds routed to any GPIO; an output to a pin that drives, an input line also to an input-only pin) –, the nets of one fn_bus use one peripheral instance (not asked of a matrix), and PWM nets of one slice have one fixed pwm_hz and a channel each. A peripheral's own pin functions do not answer for the MCU. A UART line crosses: on uart.tx another part receives, on uart.rx another part transmits (grade uart).

• pin functions: a net with fn is on a pin whose parts entry lists that function (functions), the nets of one fn_bus on one peripheral instance, two PWM nets of one slice with the same fixed pwm_hz and a channel each; a net with fn on pins without functions is a note – finds e.g.: SPI data on the clock pin, an analog input without ADC, a buzzer on the PWM slice of an LED

Why

On most MCUs a peripheral reaches only some pins, and pins share hardware: two neighbouring RP2040 GPIOs share one PWM slice and with it one frequency.

What to do

Move the net to a pin that has the function, or give the nets of a slice one frequency. Bit-banged on purpose: leave fn out.

Sources

1. pico-sdk 2.1.1, src/rp2350/hardware_regs/include/hardware/regs/io_bank0.h: IO_BANK0_GPIOn_CTRL_FUNCSEL_VALUE_* – the SPI, UART, I2C and PWM function of every GPIO – https://github.com/raspberrypi/pico-sdk/blob/2.1.1/src/rp2350/hardware_regs/include/hardware/regs/io_bank0.h
2. pico-sdk 2.1.1, src/rp2_common/hardware_pwm/include/hardware/pwm.h: each slice drives two outputs from one counter; PWM_GPIO_SLICE_NUM = (gpio >> 1) & 7 below GPIO 32, channel = gpio & 1; src/rp2350/hardware_regs/include/hardware/platform_defs.h: RP2350A ADC_BASE_PIN 26
3. Lesson of pytree (D-14, 2026-10-19): the star's blue LED at 1 kHz and the buzzer on GP20/GP21 shared PWM slice 2 – every note would have changed the blue PWM; found by chance in a review

Replaces G-15