edakit rule catalog

Every rule edakit checks – engine, code, severity, rule, why, what to do and its sources –, the domains that switch rules on, the tables of numbers, the parts schema, the reference circuits with their seeded faults, published open designs with every finding judged, and what became of the maker-coverage candidates. Generated from edakit/catalog, edakit/domains, tests/reference.py and tests/open_designs/.

14Engines

129Codes

140Grades

32Hints

9Domains

300Sources cited

8Reference circuits

10Open designs

Engines

Each engine decides one kind of relation; a finding's code is ENGINE.relation. Severities are the catalog's defaults – a project's domains may set others; a grade is a sub-case with its own severity, a topic the part of a code a domain switches on.

On the circuit

STRUCT12the graph is well-formed and names what exists9 errors · 1 warning · 2 notes LIM LIMITS10every quantity within its limit9 errors · 1 note LVL LEVELS5every input defined in every state, no two drivers fight5 errors REQ REQUIRES4what a part requires on its pins is present and in range4 errors PATH PATHS3what a reversed, unfed or misplaced supply reaches3 errors SIM6the scenarios run, are complete and reach the states they expect4 errors · 1 warning · 1 note PERF7the plan of a hand-wired board on a perfboard makes the graph's nets and can be built7 errors PARTS7parts entries complete, well-formed, verified, orderable3 errors · 1 warning · 1 pending · 2 notes DOCS7documents and requirements quote the design4 errors · 2 warnings · 1 pending HINT32patterns that need judgement, as notes32 notes

On the board and the order

SYNC10every artifact equals the graph and the plan10 errors GEO13copper, holes, print, widths and distances on plan and Gerber files10 errors · 2 warnings · 1 note FILES4manufacturing files and sheets complete and consistent4 errors ORDER9the order at the maker is the release: form, parts, quote, read, files, finish, review, confirm; the supplier's cart is the basket8 errors · 1 warning

Codes

Folded by engine; the filter opens what it finds.

Filter codes

STRUCT – the graph is well-formed and names what exists · 12

`STRUCT.name`	names unique	error
`STRUCT.pin`	every pin in one net or nc	error
`STRUCT.net`	nets well-formed	error
`STRUCT.board`	every part on a board	error
`STRUCT.ref`	settings name what exists	error
`STRUCT.purpose`	purpose stated	error
`STRUCT.lock`	pins where the firmware expects them	error
`STRUCT.domain`	suggested domains on	note
`STRUCT.edakit`	the edakit the project needs	note
`STRUCT.entry`	graph pins = parts entry	error
`STRUCT.identity`	graph and entry name the same part	error
`STRUCT.prefix`	designator prefix fits the kind	warning

SYNC – every artifact equals the graph and the plan · 10

`SYNC.schematic`	schematic = graph	error
`SYNC.pcb`	PCB = graph	error
`SYNC.footprint`	footprint = its source	error
`SYNC.plan`	board = placement plan	error
`SYNC.bom`	BOM = graph	error
`SYNC.cpl`	pick and place = PCB	error
`SYNC.odb`	ODB++ = the released files	error
`SYNC.source`	own part = its source	error
`SYNC.scripts`	project scripts current	error
`SYNC.agents`	project agents complete	error

LIM – every quantity within its limit · 10

`LIM.v`	voltage within its limit	error
`LIM.hazardous`	hazardous voltage recognised, not checked	error
`LIM.i`	current within its limit	error
`LIM.p`	power within its limit	error
`LIM.t`	temperature within its limit	error
`LIM.range`	supplied inside the operating range	error
`LIM.declared`	net inside its declared range	error
`LIM.backfeed`	no supply fed backwards	error
`LIM.eirp`	radio power within the band's limit	note
`LIM.band`	transmitter in the EU bands	error

LVL – every input defined in every state, no two drivers fight · 5

`LVL.undefined`	input defined while the firmware is not running	error
`LVL.contention`	one driver per net	error
`LVL.boot`	strapping pins at their level at reset	error
`LVL.threshold`	logic levels reach the thresholds	error
`LVL.direction`	outputs only on pins that drive	error

REQ – what a part requires on its pins is present and in range · 4

`REQ.missing`	what a part requires is there	error
`REQ.value`	what a part requires is in range	error
`REQ.forbidden`	what must stay apart is apart	error
`REQ.function`	pin functions	error

PATH – what a reversed, unfed or misplaced supply reaches · 3

`PATH.reverse`	reverse polarity blocked	error
`PATH.unfed`	every supply pin reached by a supply	error
`PATH.ground`	ground pins on ground	error

SIM – the scenarios run, are complete and reach the states they expect · 6

`SIM.config`	simulation config readable	error
`SIM.converge`	every scenario converges	error
`SIM.state`	the circuit does what the scenario expects	error
`SIM.driver`	every LED has a known driver	error
`SIM.response`	frequency response as expected	warning
`SIM.copper`	copper annotated	note

GEO – copper, holes, print, widths and distances on plan and Gerber files · 13

`GEO.copper`	copper from the Gerber files	error
`GEO.drc`	DRC	error
`GEO.width`	track width	error
`GEO.loop`	short current loops	error
`GEO.mark`	polarity marks	error
`GEO.formed`	formed leads fit one way	error
`GEO.pour`	copper per side	warning
`GEO.spacing`	pads and holes keep their distance	error
`GEO.under`	no track between the pads of a small chip part	note
`GEO.ring`	annular ring	error
`GEO.keepout`	keep-out areas free of copper	warning
`GEO.hole`	hole fits the lead	error
`GEO.silk`	silkscreen as printed	error

PERF – the plan of a hand-wired board on a perfboard makes the graph's nets and can be built · 7

`PERF.net`	perfboard plan = graph	error
`PERF.place`	every part in its holes	error
`PERF.grid`	leads on the grid	error
`PERF.body`	bodies apart, spans long enough	error
`PERF.mount`	mounting holes free	error
`PERF.wire`	bridges straight, wires into free holes	error
`PERF.current`	copper carries the current	error

FILES – manufacturing files and sheets complete and consistent · 4

`FILES.sheet`	polarity sheet	error
`FILES.manifest`	files of one run	error
`FILES.set`	Gerber set	error
`FILES.order`	order settings = board	error

PARTS – parts entries complete, well-formed, verified, orderable · 7

`PARTS.verified`	parts signed	pending
`PARTS.stock`	parts orderable	error
`PARTS.supplier`	supplier per part	warning
`PARTS.fact`	required facts given	note
`PARTS.schema`	parts entries well-formed	error
`PARTS.library`	copy of the parts library current	note
`PARTS.footprint`	footprint data complete	error

ORDER – the order at the maker is the release: form, parts, quote, read, files, finish, review, confirm; the supplier's cart is the basket · 9

`ORDER.form`	form = job	error
`ORDER.parts`	parts = release	error
`ORDER.quote`	quote against the estimate	warning
`ORDER.read`	read, not made up	error
`ORDER.files`	the same files	error
`ORDER.finish`	lead in the finish	error
`ORDER.review`	regulatory review of this order	error
`ORDER.confirm`	the maker's confirmations as released and as the sheet	error
`ORDER.basket`	the supplier's cart = the basket	error

DOCS – documents and requirements quote the design · 7

`DOCS.quote`	documents quote the design data	error
`DOCS.file`	requirements file named	pending
`DOCS.ref`	requirement references resolve	error
`DOCS.need`	accepted need has a requirement	error
`DOCS.evidence`	requirement has evidence	error
`DOCS.draft`	draft not approved	warning
`DOCS.derived`	requirement names who stated it	warning

HINT – patterns that need judgement, as notes · 32

`HINT.datasheet`	notes of the parts entries	note
`HINT.bulk`	bulk capacitor at the power input	note
`HINT.gate`	MOSFET gate resistor	note
`HINT.debounce`	debounce buttons and switches	note
`HINT.inductive`	inductive load off the board	note
`HINT.switcher`	switching regulator layout	note
`HINT.lithium`	lithium cells need protection	note
`HINT.esd`	ESD at external connectors	note
`HINT.two_supplies`	two supplies on one net	note
`HINT.readback`	read-back of a serial output	note
`HINT.motor_supply`	motor supply: bulk capacitor and returned energy	note
`HINT.heater`	a heater needs a second interruption	note
`HINT.audio_ground`	audio: ground loops and shared returns	note
`HINT.class_d`	filterless class-D output on a cable	note
`HINT.audio_switching`	switching in the audio band	note
`HINT.signal_ceramic`	class-2 ceramic in a signal path	note
`HINT.jack_battery`	battery switched by the input jack	note
`HINT.pedal_supply`	a pedal's supply among others	note
`HINT.string_ground`	the player on the amplifier's ground	note
`HINT.jack_supply`	a supply on a jack contact	note
`HINT.relay_load`	relay contacts switching a load off the board	note
`HINT.flicker`	LED flicker from PWM	note
`HINT.boost_enable`	a boost converter switched off by its enable	note
`HINT.usb_budget`	the current a USB port gives	note
`HINT.usb_inrush`	more than 10 µF on USB VBUS	note
`HINT.power_path`	a load on the charging cell	note
`HINT.charge_termination`	a charger's end of charge is not simulated	note
`HINT.protection_timing`	a cell protection's release and delays are not simulated	note
`HINT.pd_negotiation`	a USB PD sink's negotiation is not simulated	note
`HINT.input_polarity`	a power input without a polarity check	note
`HINT.thermal_copper`	thermal resistance needs its copper	note
`HINT.cable_line`	a signal line on a cable	note

edakit rule catalog

Engines

On the circuit

On the board and the order

Codes

The rest of the catalog

Domains

Tables

Reference circuits

Published open designs